module TrafficLight_tb;
	reg				start;
	reg				rst;
	reg				clk;
	wire			red;
	wire			yellow;
	wire			green;
	wire	[2:0]	cnt;

	TrafficLight U1(.start(start), .rst(rst), .clk(clk), .red(red), .yellow(yellow), .green(green), .cnt(cnt));
	
	initial begin
	clk = 1; rst = 1; start = 0;
	#15 rst = 0;
	#10 rst = 1;
	#10 start = 1;
	#10 start = 0;
	#60 start = 1;
	#10 start = 0;
	end
	
	always begin
	#5 clk = ~clk;
	end

endmodule